EDA News Monday November 24, 2003 From: EDACafe ÿÿ Previous Issues _____ Cadence _____ About This Issue Multi-threading Here's a clue - it's not multi-tasking _____ November 17 - 21, 2003 By Peggy Aycinena Read business product alliance news and analysis of weekly happenings _____ Were you to ask your prototypical software guy, he'd quickly point out the error in your ways if you were to make the laughable suggestion that multi-tasking and multi-threading are one in the same. He'd say (matter-of-factly), "Multi-tasking is when an operating system makes it look like the computer is running multiple processes at the same time, which could be separate programs, or two instances of the same program, running at the same time. However, in the case of two of those processes being two separate instances of the same program running at the same time, multi-threading allows one copy of that program in memory to support those two separate instances, without bashing each other or conflicting with each other. Without mutli-threading, you'd have to have two separate copies of the same program in memory at the same time to support those two separate instances." Right! That's when you'd put your finger tips together, tap yourself on the forehead (hard), and say out loud, "Of course! What was I thinking? Right! Of course, multi-tasking isn't multi-threading. I knew that!" Then you'd tiptoe off to your cubicle, secretly pick up the phone and call Tom Peterson at MIPS Technologies to start the whole conversation all over again. Tom's the Director of Product marketing at MIPS, which is why he's responsible for the strategy and marketing of the company's synthesizable 32- and 64-bit product lines (including system software). Surely Tom would be able to explain multi-threading. After all MIPS just made a big announcement last month introducing the MIPS MT ASE (Application Specific Extension), which is a new multi-threading (MT) extension to the company's "signature" architecture. Tom would try: "Multi-threading is the ability to take advantage of inherent parallelism commonly found in many applications. Designers are able to share CPU compute resources across multiple threads of data such that concurrent data streams can run in less time and/or the same amount of work can be completed by a smaller number of processors. By introducing an MT capability on an industry-standard architecture such as MIPS, companies are ensured of maintaining compatibility with the software already optimized for their application." "We are announcing the MT ASE technology right now, because MIPS Technologies constantly works with lead customers on architectural enhancements and core products to ensure our roadmap solves the design challenges of our customers. Accordingly, due to the ongoing increase in SoC design costs, OEMs and silicon vendors constantly need new ways to reduce costs while delivering new, compelling products to market. The customer response so far has indicated to us that they love it." "MT is a disruptive technology because it can dramatically lower the design and production costs associated with a broad set of applications. At the high-end, MT works to improve performance by more efficiently implementing multi-processor style architectures. At the low end, MT enables IC designers to eliminate a lot of fixed function IP and instead allocate a portion of CPU bandwidth to execute the function in software. An example would be replacement of 8 100-MHz microcontrollers with a single 4-8 thread CPU. Total area of the device is reduced and programmability is dramatically increased. A classic example is the elimination of a DSP that may have been tasked with audio processing on a set-top-box. Threading can allocate bandwidth on the standard CPU, but still deal with the real-time requirements of audio processing." Right again! But let's say, hypothetically, that you'd been staring at your wall calendar the whole time Tom had been talking and that you found yourself short the courage needed to ask him to start all over again, because you still didn't quite get it. Instead you would hint at your dilemma by asking a question like, "So, how much education is required on the part of your customers to actually understand all of this?" You would wait, hoping to hear that the answer was, "Lots!" Instead Tom would say, "One of the advantages of the MIPS IP cores is the ease of use and the out-of-the-box user experience. By developing complete reference design flows with partners such as Cadence, Synopsys, and others, as well as developing configuration and build-time options we have minimized the learning curve for our customers to help accelerate the products time to market. In addition we provide extensive options that give the designer the flexibility in configuring the implementation to match the demands of the target application." Somewhere in there you'd think you heard Tom reference a "classic customer arrangement" between MIPS and QuickLogic. So, still staring hard at your wall calendar, you'd ask him to explain the "classic" part. That's when Tom would say, "Of course each customer's requirements and situation are different. The 'classic' aspect is that each customer is able to use our products in unique ways to address the needs of their applications and target markets. For example QuickLogic is utilizing features of our Core coupled with the programmable features of their FPGA technology to address new and interesting solutions to challenging problems. QuickLogic is embracing this opportunity with combo products that contain both CPU core and FPGA. This gives the designer the options to customize the external logic to trade-off the software tasks. In fact our CorExtend technology also provides the designer with the ability to add instructions to the standard instruction set for even greater flexibility." Suddenly a thought would occur to you. Why not ask Tom if he could refer you to someone at QuickLogic, who would in turn allow you to go back to Square One and ask (again), "So what's up with this multi-threading thing?" Tom, never suspecting your ongoing befuddlement, would kindly send you to talk to Ian Ferguson, Vice President and General Manager for QuickMIPS Products at QuickLogic. You'd ply yourself with caffeine in anticipation of another intense phone call, ring through to Ian, and hope that he would succeed in getting through to you where others had failed. This time, undoubtedly because of the caffeine, you would not be disappointed. Ian would say, "Here is a good analogy - consider that you have a clerk in your Accounting Department, and the clerk is asked to look at expense reports, tally up the totals, and approve them to be paid. If you're in charge of Accounting, you want to keep feeding expense reports to that clerk, or you're just spending money on the clerk's salary, but not getting any useful work for the money spent." "When the clerk is working slowly, it's relatively easy for someone from another department to bring a batch of work over and put it in the Accounting clerk's inbox. However, if the clerk in Accounting starts to work faster, it's harder and harder to keep the inbox filled with work. The clerk will be sitting and waiting for paperwork to arrive from another department, unless employees from other departments start running to bring batches of work over to the clerk's inbox. However, if the Accounting clerk is really fast, it's simply not possible for employees from other departments to run fast enough to bring batches of work into Accounting to keep the clerk's inbox filled." "So, you assign the Accounting clerk to handle more tasks - more 'threads' - than just processing expense reports. You arrange to fill the clerk's inbox with tasks to keep the clerk productive when there are gaps in between batches of expense report. The clerk in Accounting could be doing payroll, for instance, when there are no expense reports to process. In fact, you could prioritize the work - expense reports always come first, but if there are none of those, the clerk should flick over and start doing some useful work on the payroll until the next batch of expense reports are placed in the inbox." "Now think in terms of a CPU core. If you have RISC cores like those from MIPS or ARM, or a PowerPC, and if you're going to do a particular bit of processing - to do anything significant, it takes multiple cycles. It's key for performance then that you keep the pipeline filled, or otherwise the processor is just sitting on its bottom - that's a technical term, by the way - waiting for something to do. If a core is focusing on just one task, increasing the speed of the CPU increases the likelihood that the CPU is sitting around not doing any useful work. By multi-threading, you're basically making a CPU more efficient. You're keeping the pipeline to the CPU on the chip full at all times. You're reducing the amount of dead time, and maximizing use of the CPU." "From a software perspective, the guy who's writing the application doesn't need to know that the CPU will be working on his application, and other applications as well - other 'threads' - when the CPU has some free time. The guy who's waiting to get his expenses paid, doesn't need to know that the Accounting clerk is doing his expenses and the payroll as well - he doesn't have to know that his expense report task is being split up with payroll. The additional tasks, or 'threads,' are irrelevant in either case - the software application developer or the guy waiting to have his expenses paid." "There are no implications at all for the guy who writes the software. The impact is really on the guy who writes the compiler, the software that takes the application and throws it at the CPU core. And the guy who writes the C++ code? The compiler converts that code into a language that the CPU core understands. From that perspective, the compiler has to organize the various threads to keep the CPU filled. The onus goes down, therefore, on the guy developing the compiler. In the embedded world, that would be GreenHills, or Wind River, or Metrowerks - the kind of company developing the underlying software technology. It's transparent to the embedded application programmer, who's basically converting generic software to make it specific to a particular CPU core." "We're working with MIPS on their next generation 24k core, which is due to go to the first customer this month. It was announced back at the Embedded Processor Forum, earlier this year. MIPS is calling it a multi-threading core, and our interest with that is that it allows customers to develop their own instruction." "Now, let's go back to the clerk in Accounting. If the clerk has a particular way of scheduling the expenses, then printing out the authorizations, and the whole thing takes 10 minutes, what the MIPS 24k allows us to do for that task is as if I'm giving the clerk a macro in Excel that allows the 10 minute task to be cut down to 3 minutes. That's the nice thing about the general purpose MIPS instruction set - it's not optimized for any specific application, but it allows you to tweak it to align it to a specific application." "One topic that's very hot right now is security and encryption - putting data into a form that nobody else can easily read. Encryption is as if the whole world is full of people who are English speakers, so you want to put your data into French. That is a very mathematically intensive task, lots of moving bits around, with multiple cycles needed. In the MIPS 24k, you could define one or two instructions to do the encryption that would take 15 instructions on a general-purpose core. Our interest in the 24K is to allow our customers to implement those hotspot customer instructions in our programmable logic. That's where our engagement with MIPS has been up to this point." "So there are two different problems here. One is make the Accounting clerk more efficient at each particular task, a process called core extend. The other is to make sure that the Accounting clerk is never idle, a process called multi-threading. Both are intended to increase system efficiency, but they go at the problem from different perspectives." Okay! Right! Feeling yourself to be on a roll, you'd take the next step. You'd ask Ian to define and distinguish between reconfigurability and reprogrammability. After all, why not live on the edge? Ian would heave a big sigh and begin, "Well, let's try to distinguish all of the stuff we've been talking about up to now from ideas like reconfigurability and reprogrammability. A block of hardware is reprogrammable if it can be configured to do a specific task. You write some software and you teach your PC to do a particular task." "However, reconfigurability is when you change the hardware on the fly to allow you to do something one minute and than wake up the system to do something different the next minute. An ASIC is not reconfigurable - you can't suddenly decide to make an ASIC for a cell phone into an ASIC for a PC. Something that is reconfigurable can be reprogrammed multiple times, but the hardware is not necessarily optimized for price point. These are products from Xilinx or Altera. You program a certain function into the hardware, then you take your software and send it to the device down on the board and modify the FPGA to change its personality within a matter of minutes." "The problem is with sensitive applications. You don't want reconfigurability in a military aircraft, for instance. You don't want the aircraft plummeting towards the earth, losing power, rebooting, and having to reconfigure as it awakens. Also, reconfigurability is not good for satellite systems, where your equipment gets bombarded with particles. The particles have the ability, when charged, to change the states in memory. If it's SRAM based and if you flick a '1' to be a '0,' the functionality changes. Also, reconfigurable systems are quite a bit easier to reverse engineer than an ASIC." Okay! Right again! You'd quickly ring off from Ian, confident that you'd mastered everything at last, and you'd call up the software guy. You'd ask him if you could buy him a cup of coffee. You'd chuckle (maliciously) when he said, "Sure." You prepare yourself to spring the trap. You'd walk into Starbucks, face the software guy, and say matter-of-factly, "So. I understand that reconfigurability and reprogrammability are basically the same thing." Then, you'd sit back and wait for his reaction. Industry News - Tools and IP Altium Ltd. announced Nexar, which the company describes as the first product to provide a "comprehensive, vendor-independent solution for system-level design on an FPGA platform. Derived from Altium's Board-on-Chip technology, Nexar integrates hardware design tools, embedded software development tools, IP-based components, virtual instrumentation and a reconfigurable development board to allow mainstream engineers, even those without HDL experience, to interactively design and implement a complete embedded system inside an FPGA. The benefits Nexar brings to engineers include parallel design of hardware and software, greater flexibility in hardware/software design partitioning, an integrated, FPGA vendor-independent solution for putting entire embedded systems into FPGAs, and a 'live' interactive design environment for system-on-FPGA development and debug." Also per the Press Release: "While many engineers look to FPGA technology to provide higher levels of on-chip integration and a lower risk alternative to the cost and lead time of conventional ASICs, system-level design on an FPGA platform is a difficult exercise, particularly when it comes to bringing the processor into the FPGA. Nexar changes this by taking proven board-level system design methodologies and retargeting them for FPGA architectures. Nexar also integrates hardware design and software development within a single environment to provide a total solution to systems design. The result is a revolutionary system-on-FPGA product that will allow risk-free chip-level systems integration, practical hardware/software co-design, a complete systems-level development environment for FPGA-based embedded design and introduces an interactive design methodology called LiveDesign that is accessible to mainstream engineers." "Nexar has wide applicability across the electronics industry, particularly in industries such as automotive, industrial control, telecoms and datacoms infrastructure, and non-electronics consumer products where product value is relatively high, but market size doesn't allow conventional ASIC development. Those who will benefit include engineers who routinely develop digital systems using off-the-shelf silicon devices, FPGA designers looking for an easier way to embed soft processor cores into their designs, and hardware and software engineers designing low- to medium-complexity embedded microcontroller applications." "Nexar will provide shorter embedded systems development cycles by enabling parallel design of hardware and software, greater flexibility in hardware software design partitioning, an integrated solution for putting entire embedded systems into FPGAs, the benefits of chip-level integration to all designers, regardless of their HDL knowledge and expertise, a personal ASIC alternative to high-cost factory ASIC implementation, and an FPGA vendor-independent solution to systems design; and a "live" interactive environment for system-on-FPGA development and debug." I had a chance to discuss the Altium release on November 20th with Rob Irwin, Manager of Brand Strategy based in Sydney, and Nancy Eastman, President of Altium's U.S. Subsidiary. Rob was in Australia and Nancy was in San Diego when we all spoke by phone. They told me, "We've been working on this particular product for about 4 years. Back in 1999, Altium went public and we used that money to fund some acquisitions in the embedded market. We saw that the high-end ASIC tools were not going to be as useful [going forward] because of spiraling costs, which would [expand] the FPGA markets." "That prompted us to start thinking about how we could provide tools to the majority of engineers. We were already focused on providing tools in volume to mainstream users, rather than to just a handful of high-end customers. And we saw the need to change the focus of the current set of FPGA tools [in order to] start looking at FPGAs as equal components - [as opposed to] ASIC technology, which only emphasiszed a single FPGA component. [At the same time], we realized that embedded designers were designing systems that - although underneath were composed of the components at the scale of millions of gates - could be designed at the board level with off-the-shelf components." "With the advent of [advanced product technology] from companies like Xilinx and Altera, FGPAs now have the capacity to have useful systems [on-chip]. As the NRE costs associated with ASIC [development] become astronomical, people are looking to FPGAs to provide an alternative. Nexar is really a productization of [all of this]. We're taking some of the methodologies that board designers are familiar with and targeting them at the FPGA platform. Nexar is fundamentally a new way of providing [established methodologies] to FPGA designers. It makes it possible to take [information] out of the schematic and drop it onto the board without having to go down to the HDL level. In general now, an engineer can put a number of [commercially available] processors onto an FPGA with little or no HDL experience. So it's a combination of technology and economics that make the Nexar release a sensible [move for us] at this time." Ansoft announces the release of RMxprt v5.0, the company's "popular" software for the design of electric machines. New features include a schematic winding editor, improved core-loss calculation and a new design template for claw-pole generators. RMxprt is available in four packages: Induction Machines, DC Commutated Machines, Synchronous Machines, and Electronically Commutated Machines. Also from Ansoft Corp. - The company announced the release of their Maxwell v10 3D/2D electromagnetic simulation software for the analysis of electromagnetic and electromechanical devices. The company says "Maxwell 3D can simulate linear translational motion and spinning rotational motion, that can accurately predict the performance of industrial applications such as motors and actuators, where motion-induced physics is crucial to device behavior. The new numerical techniques speed computation and avoid non-physical solutions, a problem that has prevented 3D motion capability from reaching the mass market sooner." Additional v10 enhancements include the ability to freeze permeability and obtain greater amounts of engineering information, the ability to determine the demagnetization operating point of permanent magnets, improved equivalent circuit model generation from the finite-element solution, adaptive time steps in 2D to reduce computation time with 2D motion problems, and the ability to calculate core-loss coefficient from a loss curve. Cadence Design Systems, Inc. announced SPECCTRAQuest for Electrical Engineers, which the company says is software that "enables electrical engineers to manage the rapidly increasing high-speed content on complex PCB systems." The new product incorporate the company's SPECCTRAQuest signal-integrity (SI) technology aimed at helping EEs shorten design cycle times and improve design quality and performance. Per the Press Release: "The number of constrained nets on a typical high-speed board design has jumped from 25 to 75 percent, or more, of the design's total nets. The role of SI engineers within a design team is to analyze these nets. However, this job is growing rapidly as the number of nets on a board that require analysis and the complexities of new chipsets increase dramatically. The new design methodology supported by SPECCTRAQuest EE improves design-team productivity and minimizes the impact on overloaded SI engineering resources, while controlling added costs, by enabling electrical engineers to develop and manage constraints on their designs without having to depend on SI engineers to analyze all of the constrained nets." Synopsys, Inc. announced that its Galaxy Design and Discovery Verification Platforms will support AMD64 architecture-based processors running Red Hat Enterprise Linux v3. The company says its core tools will run on the AMD64 instruction set, including the AMD Opteron and AMD Athlon 64. Per the Press Release: "Synopsys was the first major EDA company to make its tools available on the Linux open source operating system, and is committed to meeting its customers' needs for Linux and AMD64 solutions. Leading-edge companies are designing intricate chips with up to 100 million transistors of synthesized logic and more than 100 million transistors in memory. Designers at these companies are demanding 64-bit compute platforms for sophisticated design tools like those on Synopsys' Galaxy and Discovery Platforms to deliver significant design cycle throughput." Beta release of Synopsys products supporting the AMD64 architecture-based processors running on v3 is scheduled for calendar Q4 2003, with the production release scheduled to occur in calendar Q1 2004. Verisity Ltd. announced another major component of its Verification Process Automation (VPA) program. Verisity's strategy will provide Verification Viewports to "each specialist in the design and verification team, including hardware designers, software developers, verification specialists, architects and project managers." The company says the viewports will integrate each "stakeholder into a complete project-wide flow that yields optimal productivity, quality, predictability and resource utilization. In addition, Verisity's Verification Viewports strategy will expand Verisity's support of evolving industry standards and breadth of system and project-level analyses. Verisity's VPA solutions automate the process that starts with executable specs and verification plans to the realization of 'total coverage' of hardware and software functionality and verification closure." "The design itself can be modeled in any of the common languages, including Verilog, VHDL, SystemC, e, PSL, OVL and SystemVerilog for modeling hardware; and C, C++, or assembly language for software. Designs can also be accelerated or emulated in hardware. As the verification complexity continues to explode, each engineer has new needs and requires new inputs to the verification process and environment. As each of these specialists continue to use different languages for design, and have different perspectives on what they need to verify, it is critical to provide project teams with multiple specialized, optimized viewports for verification. This motivation was also behind Verisity's recent proposal to converge a more concise IEEE 1364 '05 Verilog standard proposal with Accellera's SystemVerilog, while complementing the emerging IEEE P1647 HVL standardization effort based on e." Also from Verisity - The company announced, in conjunction with ClearSpeed Technology, that "first-pass silicon" of ClearSpeed's CS301 floating-point processor was successful using Verisity's Verification Process Automation (VPA) tools. The companies say the CS301 is "the world's highest floating point performance chip, characterized by 25 Gigaflop performance, and is a fully programmable multi-threaded array processor which includes 64-way parallel processing and runs at the target clock speed of 200MHz while consuming under two watts of power." Newsmakers AccelChip, Inc. announced the appointment of James Pekarsky as Vice President of Finance and CFO. Prior to joining AccelChip, Pekarsky was VP of Finance and CFO at Virage Logic and held executive positions at Mentor Graphics, Advanced Molecular Systems, Sclavo Diagnostics, and Bio-Rad Laboratories. Pekarsky has a B.S. in Accounting from Indiana University of Pennsylvania and an MBA in Finance from Golden Gate University. Mentor Graphics Corp. announced that Janusz Rajski, Chief Scientist and Director of Engineering for the company's DFT product group, has been awarded the title of "Professor of Science" in Poland. The award was presented to Dr. Rajski by the President of the Republic of Poland, Aleksander Kwasniewski, at the Presidential Palace in Warsaw, on November 5th. Mentor says that Rajski is the principal inventor of the Embedded Deterministic Test (EDT) technology, architect of the company's DFT product, TestKompress, and received this honor for his "fundamental contributions in the area of design and test of digital circuits and systems." Before joining Mentor, Rajski was a member of the faculty at the Technical University of Poznan and then McGill University in Montreal. He has published more than 100 research papers and is a co-inventor on 12 U.S. patents. He is co-author of a book on BIST, a member of the SIA Roadmap Working Group on Design and Test, and serves on the Technical Advisory Board of Design Sciences of the Semiconductor Research Consortium. Rajski has an MSEE from the Technical University of Gdansk, Poland and a PhD in engineering from the Technical University of Poznan, Poland. Rajski is quoted in the Press Release: "This great honor is a recognition of the entire school of thought that my students, associates and collaborators helped create over the years. It is a credit to the collaboration between academia and the industry and a tribute to a research philosophy that intends to be academically excellent and industrially relevant." Verific Design Automation announced the appointment of Rick Carlson as Vice President of Worldwide Sales, where he will oversee all sales activities and report to Vice President of Operations Michiel Ligthart. Carlson has 23 years in EDA and has served in various capacities at AccelChip, Averant, Synplicity, Escalade (now part of Mentor Graphics), and EDA Systems. He has a B.S. in Mathematics from Illinois Institute of Technology in Chicago, IL. Importantly, Carlson is credited with founding the EDA Consortium (EDAC) in 1987. In the category of ... The nuts and bolts of accessing a global market Lawren Farber's market niche is real and it's growing. Positioning himself on the periphery of the to-ing and fro-ing of North American companies into an increasingly global market, Farber's 2nd Story Media organization is providing - along with traditional marketing services - a range of translation services including Mandarin voice-over for English-based marketing videos, as well as translation of on-screen text and graphics. Although his emphasis today is in the English-Mandarin interface, Farber says, "Currently, along with Mandarin, I'm also seeing demand for Korean, Japanese, German, and have had some inquiries lately about Portuguese and Spanish. Also as the telecomm market recovers, I expect to have requests for Italian and the Scandinavian languages, as well." "The concept of providing translation services grew out of the need to re-invent my company [in a down economy]. I decided to differentiate by trading on my Emmy and teaching people how to [integrate] video into their [business plans]. I knew from reading statistics and attending conferences that the technology market is growing significantly in Asia. I'm not a nuclear physicists, but I could see that if there are technology customers in Asia, I might trade on a powerful combination of my video expertise and the [growing market] there. Now I tell customers that they can add value to products they market in Asia by providing translated video introductions to their product lines. Basically, I'm being hired for my quality control expertise over the video, and my access to a multi-lingual talent pool." "My English-speaking customers set up a marketing agenda in English, which I arrange to have translated into Mandarin. The majority of my contract translators - whether they're working from English into Mandarin or Korean or German - not only provide translated voice-over for video, but also translate bulleted lists and other on-screen text from English into Mandarin. I'm involving Mandarin and English speaking graphic designers who also have skills in HTML to do this work. It's through networking in the graphics design community that I've come up with the talent that I need [to pursue these business opportunities]. Once the video is prepped in English and the voice-over ready, the Mandarin audio is synched up with the video and the marketing pitch is transported effectively into a medium accessible to a potential market. Basically, I'm providing translation services across languages and across medium, text to video, visual to audio." "The translation services can go both ways. Many times I hear that companies just can't afford to fly a crew over to Asia to shoot something on location - a factory floor, for instance. The concern in that case for the American arm of an Asian company, is that the product is being produced in Asia, but needs to be presented to an American market. So I might provide a script in English, which I then have translated into Mandarin - a script that the American arm can then forward to their facilities in Asia. The actual footage can then be shot on location in Asia using local video crews, based on my script. When I subsequently receive the video back in the U.S., I provide the voice-over translation back into English - as well as any necessary text or graphics translations." "Another service I can provide involves the taped proceedings of technical conferences, translating English-speaking conferences for an Asian audience. If you have a simultaneous interpreter working a conference live, providing voice-over as the event unfolds, it can be expensive to cover parallel tracks at a conference - or even to keep up with a single fast-paced presenter. If the voice-over is done in Mandarin after the fact, however, working from taped proceedings, it's possible to use a single interpreter to prepare the entire conference for an Asian audience." "Like some, I'm concerned that [American businesses] seem to be somewhat cavalier about how we are going about exporting technology and jobs. I remember when Jimmy Carter was in office, some companies thought they were very slick because they could skirt around Carter's executive order not to sell to Iran by just booking sales through Italy. Companies today who are [supposedly] following technology export laws may be allowing their products to be [illegally] copied in countries outside of the U.S., so that a market is created there for their products." "I can't solve these larger issues. For me right now, I'm identifying a need and filling it. That doesn't mean that I'm working to export jobs from the U.S. It's a global community today, one that needs 24x7 capabilities. The reality is that people today are collaborating remotely from Texas to Ireland to India. Technology is moving around the globe, which can be seen as a [positive] vision of a world where a global company can have efficient work teams being productive in every time zone." Letters to the Editor November 10th - Peace & Prosperity - Letter No. 1 Peggy, I can't thank you enough for bringing this complex and challenging subject out onto the Internet table in the excellent manner you have presented it. I enjoyed the reading! My favorite question is number ten (10). I would love to see us (the U.S.) take another lead in EDA technical development by innovating ourselves into a next generation technology. I expected that when I wrote my letter to you about my dream of 3D Solid Model Circuit Boards (Blocks), that it would already be in secret development someplace like Silicon Valley. Most interesting, are some of the comments and outlines in the interviews on outsourcing. And from current trends, I expect to see a steady increase in the number of high-level technical design position offerings migrating into lower per capita income countries. This migration will continue to grow in part thanks to worldwide educational opportunities, the global marketplace, and technology itself (telecomm, Internet, etc.). And it is true that people from all over the world are talented, viable candidates for all sorts of high-level jobs and business positions here in the United States and anywhere else for that matter. This Global Resource potential exists partly because there has always been a trend (as pointed out in your interviews) toward outsourcing jobs and IP to anywhere labor and operating costs are lower. It has typically been an acceptable quality level and the bottom line dollar that drives business to look globally for needed resources. And it is not mentally challenging to understand that outsourcing commodities and workers at lower labor rates increases profit and reduces company overhead. Here in the U.S., the process of outsourcing can become critical when a company's market share drops below expected levels. A drop in profit margin is definitely a call to action. In today's lean market, cutting costs are at the pinnacle of survival. Therefore, outsourcing becomes a hard and fast recipe for margin recovery. From my vantage point, in order for globalization to be completely successful (fair), every country would need to share a universal or "global" quality and cost-of-living environment. And since economic equality is not very likely in the near future, laid-off U.S. high-tech managers, engineers and workers are resolving to seek employment outside the high-technology realm or adjusting to the lower rate offerings from U.S. companies seeking to grow new jobs or re-staff with local talent. There is a lot more I could say here, but instead, I have just one question to share that I keep pondering - What changes this way come? The answer would be priceless! Best regards, Ed Caldwell November 10th - Peace & Prosperity - Letter No. 2 Hi Peggy, I'd like to comment on the latest EDA Weekly column regarding the "jobless recovery." First of all, I think "jobless recovery" is the most oxymoronic phrase to have come around in a while. How we can call it a recovery when more than 8.7 million people are unemployed is beyond me. And the 8.7 million figure ignores the large population of under-employed people that have been affected by this economy. I think we all understand that this is a complex issue and that cost is not the only consideration for deciding to move jobs offshore. Further, we also understand that we live in a capitalist society and it is incumbent on companies to find the most efficient means to deliver their products and services to the marketplace. But all this misses the point actually. The real questions are: 1 - Do we really believe that the loss of many of these U.S. high-tech jobs is essentially permanent (let's say, over the next 20 years)? and, if so, 2 - Do we believe that it is in the best interests of the general populous to operate our economy this way? That is, we can expect businesses to take every advantage available to them, so should we in some way limit/control that process to a greater extent? This is a government issue, not a company issue. I believe that in the global economy, over time (many years), other countries' standards of living will rise and there will eventually be reached equilibrium of salaries and standards of living among countries. But the problem is that the current unemployed can't wait for that to happen, obviously. If we know that many of these jobs will never return in the lifetimes of the current working population, should we change the way we do business as a country? Does the current system encourage stratification into wealthy and poor classes? It is all well and good for the owners of EDA companies to strive for lower costs and higher profits by sending jobs off-shore. And one can argue that in doing so, the companies will be healthier in the long term and more jobs will be created. That is the question - Will more jobs be created in a time frame that is relevant to the people who are out of work today? Or does it just mean that there will be an ever smaller and wealthier upper class and ever larger poor working class? Perhaps we need to reconsider our overall approach. Regards, John Emmitt November 17th - Taxonomy recapitulates ontology Anon - "I howled at your latest issue. Reconfirms my long-held suspicion that 'ESL' actually stands for 'Engineering as a Second Language!'" November 17th - Press Release Taxonomy And on - "I liked the list in 'Press Release Taxonimy' and can, unfortunately, hear myself saying most of them in the not too distant past. Is it time to add 'taxonomy' to the spell checker, however? And should I also add the variant 'taxonimy?'" And on anon - "Great column - someone finally taking marketeers to task for murky, intangible writing. Totally agree - 'solution' - what the hell is that? That's my bug one right now. Everyone has a 'solution' when they try to make it more than the mere sum of the parts, inferring they have more than a point tool when all they have is a point tool. Or they say they have a 'unique' (that's another word!) combination of tools that will upend the industry. Another one, which I haven't seen for a while: 'integrated' or, worse, 'seamlessly integrated.'" Finally, from Scott Winick - "Every company I have worked for has had at least one leading edge, innovative product they hoped would become a de facto standard. Perhaps, in an era where health clubs and lean cuisine rule, our claims of robust software solutions that enable success fell on fat-free, low carbohydrate ears. We were so often intensely protective of our next generation software that we'd use non-disclosure agreements to try and protect our patented (or more likely, patent-pending), industry leading solution. I often suspected that we were so far ahead of our customers that we were ready to service the needs they were unaware they had! In the marketplace, we always sought traction for our comprehensive answers to their highly complex processes. We endeavored to entice them with promises of accelerated delivery - or the fear of its alternative - even though the value added was often to our bottom line, not theirs." "The difficulty I always struggled with was that I had to explain how this solution, with its revolutionary paradigm shift was still synergistic with all the other tools I'd brought them over the years. (Ahhh, for a new territory.) The difficulty they struggled with was that as a previous early adopter willing to live on the bleeding edge, in my boss's eyes, they always remain low hanging fruit. 'Now go sell that stuff!'" --Peggy Aycinena is a Contributing Editor and can be reached by clicking here . You are registered as: [dolinsky@gsu.by]. CafeNews is a service for EDA professionals. EDACafe respects your online time and Internet privacy. To change your newsletter's details, including format and frequency, or to discontinue this service, please navigate to . If you have questions about EDACafe services, please send email to edaadmin@ibsystems.com . Copyright c 2003, Internet Business Systems, Inc. - 11208 Shelter Cove, Smithfield, VA 23420 - 888-44-WEB-44 - All rights reserved.